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Course info
KIV / ACS1
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Course description
Department/Unit / Abbreviation
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KIV
/
ACS1
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Academic Year
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2023/2024
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Academic Year
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2023/2024
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Title
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Computer Architectures 1
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Form of course completion
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Exam
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Form of course completion
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Exam
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Accredited / Credits
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Yes,
6
Cred.
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Type of completion
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Combined
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Type of completion
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Combined
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Time requirements
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Lecture
3
[Hours/Week]
Tutorial
2
[Hours/Week]
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Course credit prior to examination
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Yes
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Course credit prior to examination
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Yes
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Automatic acceptance of credit before examination
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No
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Included in study average
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YES
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Language of instruction
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Czech
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Occ/max
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Automatic acceptance of credit before examination
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No
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Summer semester
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0 / -
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0 / -
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0 / -
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Included in study average
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YES
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Winter semester
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0 / -
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1 / -
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0 / 2
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Repeated registration
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NO
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Repeated registration
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NO
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Timetable
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Yes
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Semester taught
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Winter semester
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Semester taught
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Winter semester
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Minimum (B + C) students
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10
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Optional course |
Yes
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Optional course
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Yes
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Language of instruction
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Czech
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Internship duration
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0
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No. of hours of on-premise lessons |
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Evaluation scale |
1|2|3|4 |
Periodicity |
každý rok
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Evaluation scale for credit before examination |
S|N |
Periodicita upřesnění |
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Fundamental theoretical course |
No
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Fundamental course |
Yes
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Fundamental theoretical course |
No
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Evaluation scale |
1|2|3|4 |
Evaluation scale for credit before examination |
S|N |
Substituted course
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None
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Preclusive courses
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N/A
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Prerequisite courses
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N/A
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Informally recommended courses
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N/A
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Courses depending on this Course
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N/A
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Histogram of students' grades over the years:
Graphic PNG
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XLS
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Course objectives:
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Students get acquainted with various types of computer architectures and design principles.
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Requirements on student
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Fulfilling of several small projects, passing of final test; examination - written form only (necessary knowledge - all themas from lectures plus some parts from self study)
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Content
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1. Computer Architecture Types and classification.
2. Arithmetic-Logic unit, basic operations, design and performance improvement.
3. Basic operations algorithms, hogh speed multiplication and division techniques, iterative arrays.
4. Instruction set design, prefetching mechanisms.
5. Microarchitecture. Microprogramming. Microinstruction formats. Design of microprogrammed control hardware.
6. Pipelinning, branch prediction.
7. Interrupt system, priority. Interrupt handling procedure.
8. Data transfer in the computer. Buses, arbitration mechanisms.
9. Memory hierarchy, memory mapping.
10. Cache memory. Basic cache structure and design. Fully associative, direct, and set associative mapping. Cache Coherence.
11. Memory addressing, virtual memory. Structure, and design, paging, replacement strategies.
12. Input/Output. Peripheral operations.
13. Multiprocessors and Multiple Computers. SISD, SIMD, and MIMD architectures. Centralized and distributed shared memory- architectures.
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Activities
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Fields of study
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Guarantors and lecturers
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Guarantors:
Doc. Ing. Vlastimil Vavřička, CSc. (100%),
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Lecturer:
Ing. Tomáš Mainzer, Ph.D. (100%),
Doc. Ing. Vlastimil Vavřička, CSc. (100%),
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Tutorial lecturer:
Ing. Tomáš Mainzer, Ph.D. (100%),
Doc. Ing. Vlastimil Vavřička, CSc. (100%),
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Literature
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Time requirements
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All forms of study
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Activities
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Time requirements for activity [h]
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Contact hours
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65
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Preparation for formative assessments (2-20)
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11
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Preparation for an examination (30-60)
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50
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Undergraduate study programme term essay (20-40)
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30
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Total
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156
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Prerequisites
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Learning outcomes
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Assessment methods
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Teaching methods
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